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Vector processor
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#	Item
11	VECTORIZING SURFACE MODELING ALGORITHMS David L. Humphrey Steven Zoraster ZYCOR, IncSouth IH-35 Austin, Texas 78741 Add to Reading List Source URL: mapcontext.com Language: English - Date: 2008-08-30 00:15:52 Parallel computing Algorithm Vector processor Supercomputer
12	Advanced Parallel Architecture Annalisa Massini Vector architecture 2 Add to Reading List Source URL: twiki.di.uniroma1.it Language: English - Date: 2015-04-28 17:33:30 Central processing unit Parallel computing Computer architecture Supercomputers Instruction set architectures Processor register Cray-1 MIPS instruction set SIMD Instruction set 64-bit computing Euclidean vector
13	Lecture 4: Modeling Sparse Matrix-Vector Multiply William Gropp www.cs.illinois.edu/~wgropp Sustained Memory Bandwidth Add to Reading List Source URL: wgropp.cs.illinois.edu Language: English - Date: 2015-01-15 10:20:20 Central processing unit Computer memory Cache Programming languages CPU cache Sparse matrix Processor register Fortran Data
14	MonetDB/X100: Hyper-Pipelining Query Execution Peter Boncz, Marcin Zukowski, Niels Nes CWI Kruislaan 413 Amsterdam, The Netherlands {P.Boncz,M.Zukowski,N.Nes}@cwi.nl Add to Reading List Source URL: www-db.cs.wisc.edu Language: English - Date: 2011-09-16 15:44:48 Central processing unit Relational database management systems Instruction set architectures Cross-platform software MonetDB Structured storage Column-oriented DBMS Pipeline CPU cache Optimizing compiler Vector processor Reduced instruction set computing
15	Sparse Matrix-Vector Multiply on the Keystone II Digital Signal Processor Add to Reading List Source URL: www.ieee-hpec.org Language: English - Date: 2014-08-25 20:45:31
16	Optimizing M AKWA on GPU and CPU Thomas Pornin, <> May 18, 2015 Abstract We present here optimized implementations of the M AKWA password hashing Add to Reading List Source URL: www.bolet.org Language: English - Date: 2015-09-06 14:08:28 Computer arithmetic Modular arithmetic Central processing unit Search algorithms Exponentials Exponentiation by squaring Montgomery modular multiplication Hash function Processor register 64-bit computing Euclidean vector
17	Retro dataflow: Accomplishments of the Sisal Language Project Pat Miller1 John Feo2 Tom Deboni3 Add to Reading List Source URL: www.nersc.gov Language: English - Date: 2012-02-04 21:05:42 SISAL Models of computation Computer architecture Supercomputers Parallel computing Dataflow Vector processor Assignment Cray-2 Computing Software engineering Functional languages
18	Autovectorization in GCC Dorit Naishlos IBM Research Lab in Haifa Abstract Add to Reading List Source URL: gcc.cybermirror.org Language: English - Date: 2004-08-29 18:00:00 Parallel computing Vectors Abstract algebra Compiler optimizations Vectorization Vector processor SIMD Dependence analysis Data structure alignment Algebra Mathematics Linear algebra
19	SPU C/C++ Language Extensions Version 2.1 CBEA JSRE Series Cell Broadband Engine Architecture Add to Reading List Source URL: cell.scei.co.jp Language: English - Date: 2009-11-06 03:19:04 Find first set Sequence container Addressing mode Processor register Euclidean vector 64-bit Pointer Cell software development DEC Alpha Computer architecture Computing Cell
20	The NAP (N-Dimensional Array Processor) Extension to Tcl Harvey Davies CSIRO Atmospheric Research Private Bag Number 1, Aspendale Victoria 3195, Australia Add to Reading List Source URL: www.tcl.tk Language: English - Date: 2010-07-07 17:54:57 Abstract algebra Vectors Vector calculus Array programming languages Vector space Array data structure Array data type Matrix Array programming Algebra Mathematics Linear algebra